book

The 8085 Microprocessor: Architecture, Programming and Interfacing

by Udaya Kumar K., Umashankar B.S.

June 2008

Beginner to intermediate

624 pages

18h 20m

English

Pearson India

Read now

Unlock full access

ACKNOWLEDGEMENTS
INTRODUCTION
1.1 EARLY INTEGRATED CIRCUITS1.2 4-BIT MICROPROCESSORS1.3 8-BIT MICROPROCESSORS1.4 16-BIT MICROPROCESSORS1.5 32-BIT MICROPROCESSORS1.6 RECENT MICROPROCESSORS1.7 MICROCONTROLLERS AND DIGITAL SIGNAL PROCESSORS
2.1 CALCULATOR2.2 COMPUTER2.3 MICROCOMPUTER2.4 COMPUTER LANGUAGESQUESTIONS
3.1 UNSIGNED BINARY INTEGERS3.2 SIGNED BINARY INTEGERS3.3 REPRESENTATION OF FRACTIONS3.4 SIGNED FLOATING POINT NUMBERSQUESTIONS
4.1 HISTORY OF MICROPROCESSORS4.2 DESCRIPTION OF 8085 PINS4.3 PROGRAMMER'S VIEW OF 8085: NEED FOR REGISTERS4.3.1 MEANING OF PROGRAMMER'S VIEW4.4 ACCUMULATOR OR REGISTER A4.5 REGISTERS B, C, D, E, H, AND LQUESTIONS
5.1 PROBLEM STATEMENT5.2 ABOUT THE MICROPROCESSOR KIT5.3 USING THE MICROPROCESSOR KIT IN SERIAL MODEQUESTIONS
6.1 CLASSIFICATION OF 8085 INSTRUCTIONS6.2 INSTRUCTION TYPE MVI r, d86.3 INSTRUCTION TYPE MOV r1, r26.4 INSTRUCTION TYPE MOV r, M6.5 INSTRUCTION TYPE MOV M, r6.6 INSTRUCTION TYPE LXI rp, d166.7 INSTRUCTION TYPE MVI M, d86.8 INSTRUCTION TYPE LDA a166.9 INSTRUCTION TYPE STA a166.10 INSTRUCTION TYPE XCHG6.11 ADDRESSING MODES OF 80856.12 INSTRUCTION TYPE LDAX rp6.13 INSTRUCTION TYPE STAX rp6.14 INSTRUCTION TYPE LHLD a166.15 INSTRUCTION TYPE SHLD a16QUESTIONS
7.1 INSTRUCTIONS TO PERFORM ADDITION7.2 INSTRUCTIONS TO PERFORM SUBTRACTION7.3 INSTRUCTION TYPE INX rp7.4 INSTRUCTION TYPE DCX rp7.5 INSTRUCTION TYPE DAD rp7.6 DECIMAL ADDITION IN 8085QUESTIONS
8.1 INSTRUCTIONS TO PERFORM ‘AND’ OPERATION8.2 INSTRUCTIONS TO PERFORM ‘OR’ OPERATION8.3 INSTRUCTIONS TO PERFORM ‘EXCLUSIVE OR’ OPERATION8.4 INSTRUCTION TO COMPLEMENT ACCUMULATOR8.5 INSTRUCTIONS TO COMPLEMENT/SET ‘Cy’ FLAG8.6 INSTRUCTIONS TO PERFORM COMPARE OPERATION8.7 INSTRUCTIONS TO ROTATE ACCUMULATORQUESTIONS
9.1 STACK AND THE STACK POINTER9.2 INSTRUCTION TYPE POP rp9.3 INSTRUCTION TYPE PUSH rp9.4 INSTRUCTION TYPE LXI SP, d169.5 INSTRUCTION TYPE SPHL9.6 INSTRUCTION TYPE XTHL9.7 INSTRUCTION TYPE INX SP9.8 INSTRUCTION TYPE DCX SP9.9 INSTRUCTION TYPE DAD SP9.10 INSTRUCTION TYPE NOPQUESTIONS
10.1 MORE DETAILS ABOUT PROGRAM EXECUTION10.2 UNCONDITIONAL JUMP INSTRUCTIONS10.3 CONDITIONAL JUMP INSTRUCTIONS10.4 UNCONDITIONAL CALL AND RETURN INSTRUCTIONS10.5 CONDITIONAL CALL INSTRUCTIONS10.6 CONDITIONAL RETURN INSTRUCTIONS10.7 RST n —RESTART INSTRUCTIONSQUESTIONS
11.1 CONCEPT OF CHIP SELECTION11.2 RAM CHIP PIN DETAILS AND ADDRESS RANGE11.3 MULTIPLE MEMORY ADDRESS RANGE11.4 WORKING OF 74138 DECODER IC11. USE OF 74138 TO GENERATE CHIP SELECT LOGIC11.6 USE OF 74138 IN ALS-SDA-85M KITQUESTIONS
12.1 NEED FOR I/O PORTS12.2 IN AND OUT INSTRUCTIONS12.3 MEMORY-MAPPED I/O12.4 I/O-MAPPED I/O12.5 COMPARISON OF MEMORY-MAPPED I/O AND I/O-MAPPED I/OQUESTIONS
13.1 DETAILS OF 8085 ARCHITECTURE13.2 INSTRUCTION CYCLE13.3 COMPARISON OF DIFFERENT MACHINE CYCLES13.4 MEMORY SPEED REQUIREMENT13.5 WAIT STATE GENERATIONQUESTIONS
INTRODUCTION
14.1 EXCHANGE 10 BYTES14.2 ADD TWO MULTI-BYTE NUMBERS14.3 ADD TWO MULTI-BYTE BCD NUMBERS14.4 BLOCK MOVEMENT WITHOUT OVERLAP14.5 BLOCK MOVEMENT WITH OVERLAP14.6 ADD N NUMBERS OF SIZE 8 BITS14.7 CHECK THE FOURTH BIT OF A BYTE14.8 SUBTRACT TWO MULTI-BYTE NUMBERS14.9 MULTIPLY TWO NUMBERS OF SIZE 8 BITS14.10 DIVIDE A 16-BIT NUMBER BY AN 8-BIT NUMBERQUESTIONS
15.1 STEPS NEEDED TO RUN AN ASSEMBLY LANGUAGE PROGRAM15.2 CREATION OF .ASM FILE USING A TEXT EDITOR15.3 GENERATION OF .OBJ FILE USING A CROSS-ASSEMBLER15.4 GENERATION OF .HEX FILE USING A LINKER15.5 DOWNLOADING THE MACHINE CODE TO THE KIT15.6 RUNNING THE DOWNLOADED PROGRAM ON THE KIT15.7 RUNNING THE PROGRAM USING THE PC AS A TERMINALQUESTIONS
16.1 SEARCH FOR A NUMBER USING LINEAR SEARCH16.2 FIND THE SMALLEST NUMBER16.3 COMPUTE THE HCF OF TWO 8-BIT NUMBERS16.4 CHECK FOR ‘2 OUT OF 5’ CODE16.5 CONVERT ASCII TO BINARY16.6 CONVERT BINARY TO ASCII16.7 CONVERT BCD TO BINARY16.8 CONVERT BINARY TO BCD16.9 CHECK FOR PALINDROME16.10 COMPUTE THE LCM OF TWO 8-BIT NUMBERS16.11 SORT NUMBERS USING BUBBLE SORT16.12 SORT NUMBERS USING SELECTION SORT16.13 SIMULATE DECIMAL UP COUNTER16.14 SIMULATE DECIMAL DOWN COUNTER16.15 DISPLAY ALTERNATELY 00 AND FF IN THE DATA FIELD16.16 SIMULATE A REAL-TIME CLOCKQUESTIONS
17.1 SUBTRACT MULTI-BYTE BCD NUMBERS17.2 CONVERT 16-BIT BINARY TO BCD17.3 DO AN OPERATION ON TWO NUMBERS BASED ON THE VALUE OF X17.4 DO AN OPERATION ON TWO BCD NUMBERS BASED ON THE VALUE OF X17.5 BUBBLE SORT IN ASCENDING/DESCENDING ORDER AS PER CHOICE17.6 SELECTION SORT IN ASCENDING/DESCENDING ORDER AS PER CHOICE17.7 ADD CONTENTS OF N WORD LOCATIONS17.8 MULTIPLY TWO 8-BIT NUMBERS (SHIFT AND ADD METHOD)17.9 MULTIPLY TWO 2-DIGIT BCD NUMBERS17.10 MULTIPLY TWO 16-BIT BINARY NUMBERSQUESTIONS
INTRODUCTION
18.1 DATA TRANSFER SCHEMES18.2 GENERAL DISCUSSION ABOUT 8085 INTERRUPTS18.3 EI AND DI INSTRUCTIONS18.4 INTR AND INTA* PINS18.5 RST5.5 AND RST6.5 PINS18.6 RST7.5 PIN18.7 TRAP INTERRUPT PIN18.8 EXECUTION OF ‘DAD rp’ INSTRUCTION18.9 SIM AND RIM INSTRUCTIONS18.10 HLT INSTRUCTION18.11 PROGRAMS USING INTERRUPTSQUESTIONS
19.1 WORKING OF 821219.2 APPLICATIONS OF 8212QUESTIONS
20.1 DESCRIPTION OF 8255 PPI20.2 OPERATIONAL MODES OF 825520.3 CONTROL PORT OF 825520.4 MODE 1—STROBED I/O20.5 MODE 2—BI-DIRECTIONAL I/OQUESTIONS
21.1 DESCRIPTION OF LOGIC CONTROLLER INTERFACE21.2 SUCCESSIVE APPROXIMATION ADC INTERFACE21.3 DUAL SLOPE ADC INTERFACE21.4 DIGITAL TO ANALOG CONVERTER INTERFACE21.5 STEPPER MOTOR INTERFACEQUESTIONS
INTRODUCTION
22.1 INTERFACING 7-SEGMENT DISPLAY22.2 DISPLAY INTERFACE USING SERIAL TRANSFER22..3 INTERFACING A SIMPLE KEYBOARD22.4 INTERFACING A MATRIX KEYBOARD22..5 DESCRIPTION OF MATRIX KEYBOARD INTERFACE22.6 INTEL 8279 KEYBOARD AND DISPLAY CONTROLLER22.7 PROGRAMS USING 8279QUESTIONS
23.1 NEED FOR AN INTERRUPT CONTROLLER23.2 OVERVIEW OF THE WORKING OF 825923.3 PINS OF 825923.4 REGISTERS USED IN 825923.5 PROGRAMMING THE 8259 WITH NO SLAVES23.6 PROGRAMMING THE 8259 WITH SLAVES23.7 USE OF 8259 IN AN 8086-BASED SYSTEM23.8 ARCHITECTURE OF 8259QUESTIONS
24.1 CONCEPT OF DIRECT MEMORY ACCESS (DMA)24.2 NEED FOR DMA DATA TRANSFER24.3 DESCRIPTION OF 8257 DMA CONTROLLER CHIP24.4 PROGRAMMING THE 825724.5 DESCRIPTION OF THE PINS OF 825724.6 WORKING OF THE 8257 DMA CONTROLLER24.7 STATE DIAGRAM OF 8085QUESTIONS
25.1 NEED FOR PROGRAMMABLE INTERVAL TIMER25.2 DESCRIPTION OF 8253 TIMER25.3 PROGRAMMING THE 825325.4 MODE 0—INTERRUPT ON TERMINAL COUNT25.5 MODE 1—RE-TRIGGERABLE MONO-STABLE MULTI25.6 MODE 2—RATE GENERATOR25.7 MODE 3—SQUARE WAVE GENERATOR25.8 MODE 4—SOFTWARE-TRIGGERED STROBE25.9 MODE 5—HARDWARE-TRIGGERED STROBE25.10 USE OF 8253 IN ALS-SDA-85 KITQUESTIONS
26.1 NEED FOR USART26.2 ASYNCHRONOUS TRANSMISSION26.3 ASYNCHRONOUS RECEPTION26.4 SYNCHRONOUS TRANSMISSION26.5 SYNCHRONOUS RECEPTION26.6 PIN DESCRIPTION OF 8251 USART26.7 PROGRAMMING THE 825126.8 USE OF SOD PIN OF 8085 FOR SERIAL TRANSFERQUESTIONS
27.1 COMPARISON OF INTEL 8080 WITH INTEL 808527.2 PROGRAMMER'S VIEW OF Z-8027.3 SPECIAL FEATURES OF Z-8027.4 ADDRESSING MODES OF Z-8027.5 SPECIAL INSTRUCTION TYPES27.6 PINS OF Z-8027.7 INTERRUPT STRUCTURE IN Z-8027.8 PROGRAMMING EXAMPLES27.9 INSTRUCTION SET SUMMARYQUESTIONS
28.1 PIN DESCRIPTION OF 680028.2 PROGRAMMER's VIEW OF 680028.3 ADDRESSING MODES OF 680028.4 INSTRUCTION SET OF 680028.5 INTERRUPTS OF 6800PROGRAMMING EXAMPLESQUESTIONS
29.1 MAIN FEATURES OF INTEL 805129.2 FUNCTIONAL BLOCKS OF INTEL 805129.3 PROGRAM MEMORY STRUCTURE29.4 DATA MEMORY STRUCTURE29.5 PROGRAMMER'S VIEW OF 805129.6 ADDRESSING MODES OF 805129.7 INSTRUCTION SET OF 805129.8 PROGRAMMING EXAMPLESQUESTIONS
30.1 INTERRUPT STRUCTURE OF 805130.2 TIMERS OF 805130.3 SERIAL INTERFACE30.4 STRUCTURE AND OPERATION OF PORTS30.5 POWER SAVING MODES OF 805130.6 PROGRAMMING OF EPROM IN 8751BHQUESTIONS