CMOS Analog Integrated Circuits

List of Figures

1.1        Example of an SoC floorplan.

1.2        Specification partition into subsystems.

1.3        Circuit design verification.

1.4        Design flow for an integrated system.

1.5        A chip including a built-in self-test structure.

2.1        Transistor scaling advance: A plot of the feature size versus time.

2.2        Model and structure of (a) nMOS transistor and (b) pMOS transistor.

2.3        Localization of the inversion and depletion regions in a MOS transistor.

2.4        Plot of the charge density versus the surface potential.

2.5        Plot of the drain current versus the drain-source voltage.

2.6        Plot of the drain current versus the gate-source voltage.

2.7        I/V characteristics of an nMOS transistor. ...