Naveen Rao

Naveen’s fascination with computation in synthetic and neural systems began around age 9 when he began learning about circuits that store information along with some AI themes prevalent in sci-fi at the time. He went on to study electrical engineering and computer science at Duke, but continued to stay in touch with biology by modeling neuromorphic circuits as a senior project. After studying computer architecture at Stanford, Naveen spent the next 10 years designing novel processors at Sun Microsystems and Teragen as well as specialized chips for wireless DSP at Caly Networks, video content delivery at Kealia, Inc, and video compression at W&W Comms. Armed with intimate knowledge of synthetic computation systems, Naveen decided to get a PhD in Neuroscience to understand how biological systems do computation better. He studied neural computation and how it relates to neural prosthetics in the lab of John Donoghue at Brown. After a stint in finance doing algorithmic trading optimization at ITG, Naveen most recently was part of the Qualcomm’s neuromorphic research group leading the effort on motor control and doing business development. It’s in Nervana’s DNA to bring together engineering disciplines and neural computational paradigms to evolve the state-of-the-art and make machines smarter.

Radar

Deep learning at scale and use cases

September 27, 2016

Naveen Rao outlines deep learning challenges and explores how changes to the organization of computation and communication can lead to advances in capabilities.

Content

Evolve AI

June 29, 2017

Naveen Rao explains how Intel Nervana is evolving the AI stack from silicon to the cloud.