VLSI Digital Signal Processing Systems: Design and Implementation

REFERENCES

1. H. T. Kung and C. E. Leiserson, “Systolic arrays (for VLSI),” in Sparse Matrix Symposium, SIAM, pp. 256–282, 1978.

2. H. T. Kung, “Why systolic architectures?” IEEE Computers Magazine, vol. 15, pp. 37–45, Jan. 1982.

3. S. Y. Kung, VLSI Array Processors. Prentice Hall, 1988.

Fig. 7.37    Two-dimensional systolic array for motion estimation in Problem 18. The processing element AD computes the absolute difference; A computes addition; and M compares s(m,n) and selects the displacement vector. The indexes are data x(i, j) and y(i + m, j + n).

Fig. 7.38    One-dimensional systolic array for motion estimation in Problem 18.

Fig. 7.39    Two-dimensional systolic array for motion estimation in Problem. 19.

Fig. 7.40    One-dimensional systolic array for motion estimation in Problem 19.

4. H. V. Jagadish, S. K. Rao, and T. Kailath, “Array architecture for iterative algorithms,” Proc. IEEE, vol. 75, no. 9, pp. 1304–1321, Sept. 1987.

5. P. Quinton, “Automatic synthesis of systolic arrays from uniform recurrent equations,” in Proc. of 11th Annual Symposium on Computer Architecture ...