1ESD, EOS, EMI, EMC, and Latchup
As an introduction, the chapter will first provide a short description of electrostatic discharge (ESD), electrical overstress (EOS), electromagnetic interference, electromagnetic compatibility and latchup. This will be followed by an introduction to the various electrostatic discharge sources and models, followed by an introduction to electrical overstress issues, and the other areas. Electrostatics has been a subject of interest for many years [1–15].
1.1 Electrostatic Discharge (ESD)
1.1.1 What Do You Mean by the Term “Electrostatic Discharge”?
ESD is a subclass of EOS and may cause immediate device failure, permanent parameter shifts and latent damage causing increased degradation rate [15–76]. It has at least one of the following three components: localized heat generation, high current density and high electric field gradient; in addition, there is the prolonged presence of currents of several amperes that transfer energy to the device structure which can cause damage.
ESD is addressed on semiconductor components through ESD circuits, chip architecture and design. During ESD events, ESD failure mechanisms occur in the semiconductor devices. In ESD semiconductor chip design, the ESD design discipline is customized to different application spaces, such as ESD digital design, ESD radio frequency (RF) design, and ESD analog design. With semiconductor component scaling, and both evolutionary and revolutionary changes, ESD devices and design ...
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