5

Reflection on Signal Lines

Typical interconnects such as microstrip or stripline in PCBs, coaxial cables, and parallel or twisted-pair wire cables must be modeled as transmission lines (TLs) owing to the high speed of the digital devices used nowadays. Among the main undesired effects are reflections caused by discontinuities along the line and mismatching at the ends of the interconnects. The aim of this chapter is to provide methods to predict reflections. More detailed information on TLs can be found in many of the textbooks listed in the references. The equivalent circuit of an interconnect as a cascade of lumped elements is first discussed. An analytical solution, lattice diagram, exact SPICE model for a lossless line, and a graphical approach are outlined in order to compute incident and reflected waves. An example of the graphical method applied to Transistor–Transistor Logic (TTL) devices is discussed as background for other logic families. Signal distribution architectures to avoid uncontrolled situations are presented and defined. The chapter ends with a discussion about different types of line termination to enhance Signal Integrity (SI) and mitigate reflections. The performance of different terminations is shown by circuit simulations.

5.1 Electrical Parameters of Interconnects

An interconnect can be modelled as a transmission line in several ways. In any case, each model is based on the electric parameters of the line in terms of per-unit-length (p.u.l.) resistance, ...

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