4 Circuit Errors and Compensation Techniques in Continuous‐time Modulators
Following the analysis of nonidealities in SC‐ Ms in Chapter 3, this chapter focuses on the main circuit and system effects on the operation of CT‐ Ms. The first part of the chapter is devoted to the nonideal performance caused by CT‐ M building blocks, in particular integrators and resonators. These are briefly described in Section 4.2. This group of errors includes finite DC gain (Section 4.3], time‐constant variation (Section 4.4], transient response (Section 4.5], nonlinear harmonic distortion (Section 4.6], and circuit noise (Section 4.7]. The second part of the chapter covers the dominant sources of so‐called “architectural timing errors” in CT‐ Ms, namely clock jitter (Section 4.8], excess loop delay (Section 4.9], and quantizer metastability (Section 4.10].
4.1 Overview of Nonidealities in Continuous‐time Modulators
As stated in Section 2.6, CT‐ Ms are potentially faster than SC ones, leading ...
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