Book description
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap between the separate worlds of hardware and software design— the key feature of reconfigurable computing is its groundbreaking ability to perform computations in hardware to increase performance while retaining the flexibility of a software solution. Reconfigurable computers serve as affordable, fast, and accurate tools for developing designs ranging from single chip architectures to multi-chip and embedded systems.
Scott Hauck and Andre DeHon have assembled a group of the key experts in the fields of both hardware and software computing to provide an introduction to the entire range of issues relating to reconfigurable computing. FPGAs (field programmable gate arrays) act as the “computing vehicles to implement this powerful technology. Readers will be guided into adopting a completely new way of handling existing design concerns and be able to make use of the vast opportunities possible with reconfigurable logic in this rapidly evolving field.
- Designed for both hardware and software programmers
- Views of reconfigurable programming beyond standard programming languages
- Broad set of case studies demonstrating how to use FPGAs in novel and efficient ways
Table of contents
- Copyright
- The Morgan Kaufmann Series in Systems on Silicon
- List of Contributors
- Preface
- Introduction
-
I. Reconfigurable Computing Hardware
- 1. Device Architecture
- 2. Reconfigurable Computing Architectures
- 3. Reconfigurable Computing Systems
- 4. Reconfiguration Management
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II. Programming Reconfigurable Systems
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5. Compute Models and System Architectures
- 5.1. Compute Models
- 5.2. System Architectures
-
References
- 6. Programming FPGA Applications in VHDL
-
7. Compiling C for Spatial Computing
- 7.1. Overview of How C Code Runs on Spatial Hardware
- 7.2. Automatic Compilation
- 7.3. Uses and Variations of C Compilation to Hardware
- 7.4. Summary
-
References
- 8. Programming Streaming FPGA Applications Using Block Diagrams in Simulink
- 9. Stream Computations Organized for Reconfigurable Execution
- 10. Programming Data Parallel FPGA Applications Using the SIMD/Vector Model
- 11. Operating System Support for Reconfigurable Computing
- 12. The JHDL Design and Debug System
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5. Compute Models and System Architectures
-
III. Mapping Designs to Reconfigurable Platforms
- 13. Technology Mapping
- FPGA Placement
- 14. Placement for General-purpose FPGAs
- 15. Datapath Composition
- 16. Specifying Circuit Layout on FPGAs
- 17. PathFinder: A Negotiation-based, Performance-driven Router for FPGAs
- 18. Retiming, Repipelining, and C-slow Retiming
- 19. Configuration Bitstream Generation
- 20. Fast Compilation Techniques
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IV. Application Development
- 21. Implementing Applications with FPGAs
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22. Instance-specific Design
- 22.1. Instance-specific Design
- 22.2. Partial Evaluation
- 22.3. Summary
-
References
- 23. Precision Analysis for Fixed-point Computation
- 24. Distributed Arithmetic
- 25. CORDIC Architectures for FPGA Computing
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26. Hardware/Software Partitioning
- 26.1. The Trend Toward Automatic Partitioning
- 26.2. Partitioning of Sequential Programs
- 26.3. Partitioning of Parallel Programs
- 26.4. Summary and Directions
-
References
-
V. Case Studies of FPGA Applications
- 27. SPIHT Image Compression
- 28. Automatic Target Recognition Systems on Reconfigurable Devices
- 29. Boolean Satisfiability: Creating Solvers Optimized for Specific Problem Instances
-
30. Multi-FPGA Systems: Logic Emulation
- 30.1. Background
- 30.2. Uses of Logic Emulation Systems
- 30.3. Types of Logic Emulation Systems
- 30.4. Issues Related to Contemporary Logic Emulation
- 30.5. The Need for Fast FPGA Mapping
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30.6. Case Study: The VirtuaLogic VLE Emulation System
- 30.6.1. The VirtuaLogic VLE Emulation System Structure
- 30.6.2. The VirtuaLogic Emulation Software Flow
- 30.6.3. Multiported Memory Mapping
- 30.6.4. Design Mapping with Multiple Asynchronous Clocks
- 30.6.5. Incremental Compilation of Designs
- 30.6.6. VLE Interfaces for Coverification
- 30.6.7. Parallel FPGA Compilation for the VLE System
- 30.7. Future Trends
- 30.8. Summary
-
References
- 31. The Implications of Floating Point for FPGAs
- 32. Finite Difference Time Domain: A Case Study Using FPGAs
- 33. Evolvable FPGAs
- 34. Network Packet Processing in Reconfigurable Hardware
- 35. Active Pages: Memory-centric Computation
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VI. Theoretical Underpinnings and Future Directions
- 36. Theoretical Underpinnings
- 37. Defect and Fault Tolerance
- 38. Reconfigurable Computing and Nanoscale Architecture
Product information
- Title: Reconfigurable Computing
- Author(s):
- Release date: July 2010
- Publisher(s): Morgan Kaufmann
- ISBN: 9780080556017
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