Book description
C-based techniques for building high-performance, FPGA-accelerated software applications
Circuits, Devices, and Systems
C-based Techniques for Optimizing FPGA Performance, Design Flexibility, and Time to Market
Forward written by Clive "Max" Maxfield.
High-performance FPGA-accelerated software applications are a growing demand in fields ranging from communications and image processing to biomedical and scientific computing. This book introduces powerful, C-based parallel-programming techniques for creating these applications, verifying them, and moving them into FPGA hardware.
The authors bridge the chasm between "conventional" software development and the methods and philosophies of FPGA-based digital design. Software engineers will learn to look at FPGAs as "just another programmable computing resource," while achieving phenomenal performance because much of their code is running directly in hardware. Hardware engineers will master techniques that perfectly complement their existing HDL expertise, while allowing them to explore design alternatives and create prototypes far more rapidly. Both groups will learn how to leverage C to support efficient hardware/software co-design and improve compilation, debugging, and testing.
Understand when C makes sense in FPGA development and where it fits into your existing processes
Leverage C to implement software applications directly onto mixed hardware/software platforms
Execute and test the same C algorithms in desktop PC environments and in-system using embedded processors
Master new, C-based programming models and techniques optimized for highly parallel FPGA platforms
Supercharge performance by optimizing through automated compilation
Use multiple-process streaming programming models to deliver truly astonishing performance
Preview the future of FPGA computing
Study an extensive set of realistic C code examples
Table of contents
- Copyright
- Prentice Hall Modern Semiconductor Design Series
- Foreword
- Preface
- Acknowledgments
-
1. The FPGA as a Computing Platform
- 1.1. A Quick Introduction to FPGAs
- 1.2. FPGA-Based Programmable Hardware Platforms
- 1.3. Increasing Performance While Lowering Costs
- 1.4. The Role of Tools
- 1.5. The FPGA as an Embedded Software Platform
- 1.6. The Importance of a Programming Abstraction
- 1.7. When Is C Language Appropriate for FPGA Design?
- 1.8. How to Use This Book
- 2. A Brief History of Programmable Platforms
- 3. A Programming Model for FPGA-Based Applications
-
4. An Introduction to Impulse C
- 4.1. The Motivation Behind Impulse C
- 4.2. The Impulse C Programming Model
- 4.3. A Minimal Impulse C Program
- 4.4. Processes Streams Signals, and Memory
- 4.5. Impulse C Signed and Unsigned Datatypes
- 4.6. Understanding Processes
- 4.7. Understanding Streams
- 4.8. Using Output Streams
- 4.9. Using Input Streams
- 4.10. Avoiding Stream Deadlocks
- 4.11. Creading and Using Signals
- 4.12. Understanting Registers
- 4.13. Using Shared Memories
- 4.14. Memory and Stream Performance Considerations
- 4.15. Summary
- 5. Describing a FIR Filter
-
6. Generating FPGA Hardware
- 6.1. The Hardware Generation Flow
- 6.2. Understanding the Generated Structure
- 6.3. Stream and Signal Interfaces
- 6.4. Using HDL Simulation to Understand Stream Protocols
- 6.5. Debugging the Generated Hardware
- 6.6. Hardware Generation Notes
- 6.7. Making Efficient Use of the Optimizers
- 6.8. Language Constraints for Hardware Processes
- 6.9. Summary
- 7. Increasing Statement-Level Parallelism
- 8. Porting a Legacy Application to Impulse C
-
9. Creating an Embedded Test Bench
- 9.1. A Mixed Hardware and Software Approach
- 9.2. The Embedded Processor as a Test Generator
- 9.3. The Role of Hardware Simulators
- 9.4. Testing the Triple-DES Algorithm in Hardware
- 9.5. Software Stream Macro Interfaces
-
9.6. Building the Test System
- Specifying the Platform Support Package
- Generating HDL for the Hardware Process
- Creating the Platform Using the Xilinx Tools
- Creating a Platform Studio Project and Choosing a Board
- Configuring the MicroBlaze Processor
- Exporting Files from the Impulse Tools
- Importing the Generated Hardware
- Adding the 3DES Hardware IP Core
- Setting the FSL Bus Parameters and Connections for the Core
- Adding and Configuring an OPB Timer Core
- Specifying the Peripheral Addresses
- Specifying the System Clock Pin
- Importing the Application Software
- Generating the FPGA Bitmap
- Downloading and Running the Application
- 9.7. Summary
- 10. Optimizing C for FPGA Performance
-
11. Describing System-Level Parallelism
- 11.1. Design Overview
- 11.2. Performing Desktop Simulation
- 11.3. Refinement 1: Creating Parallel 8-Bit Filters
- 11.4. Refinement 2: Creating a System-Level Pipeline
-
11.5. Moving the Application to Hardware
- Generating the FPGA Hardware
- Exporting the Generated Files
- Creating a New Quartus and SOPC Builder Project
- Creating the New Platform Using SOPC Builder
- Configuring the FPGA Platform
- Adding Nios II Peripherals
- Adding the Hardware Process Module (img_arch)
- Setting Additional CPU Settings
- Generating the System
- Connecting the Generated System to FPGA Pins
- FPGA Pin Assignment
- Generating the FPGA Bitmap
- Running the Test Application on the Platform
- 11.6. Summary
-
12. Combining Impulse C with an Embedded Operating System
- 12.1. The uClinux Operating System
-
12.2. A uClinux Demonstration Project
- The Impulse C Project Files
- Building the Application for the Target Platform
- Copying the Sample uClinux Platform Files
- Specifying the Platform Support Package
- Building the Image Filter Hardware
- Exporting the Software and Hardware
- Modifying the Sample uClinux Platform
- Configuring the Platform with the Image Filter IP Core
- Making the FSL Connections
- Connecting the Image Filter Clock and Reset Lines
- Generating the FPGA Bitmap
- Downloading the Kernel Image
- Building and Testing the Image Filter Software
- Using TFTP to Transfer Files to the Board
- Running the Image Filter Program
- 12.3. Summary
- 13. Mandelbrot Image Generation
- 14. The Future of FPGA Computing
- A. Getting the Most Out of Embedded FPGA Processors
- B. Creating a Custom Stream Interface
-
C. Impulse C Function Reference
- CO_ARCHITECTURE_CREATE
- CO_BIT_EXTRACT
- CO_BIT_EXTRACT_U
- CO_BIT_INSERT
- CO_BIT_INSERT_U
- CO_EXECUTE
- CO_INITIALIZE
- CO_MEMORY_CREATE
- CO_MEMORY_PTR
- CO_MEMORY_READBLOCK
- CO_MEMORY_WRITEBLOCK
- CO_PAR_BREAK
- CO_PROCESS_CONFIG
- CO_PROCESS_CREATE
- CO_REGISTER_CREATE
- CO_REGISTER_GET
- CO_REGISTER_PUT
- CO_REGISTER_READ
- CO_REGISTER_WRITE
- CO_SIGNAL_CREATE
- CO_SIGNAL_POST
- CO_SIGNAL_WAIT
- CO_STREAM_CLOSE
- CO_STREAM_CREATE
- CO_STREAM_EOS
- CO_STREAM_OPEN
- CO_STREAM_READ
- CO_STREAM_READ_NB
- CO_STREAM_WRITE
- COSIM_LOGWINDOW_CREATE
- COSIM_LOGWINDOW_FWRITE
- COSIM_LOGWINDOW_INIT
- COSIM_LOGWINDOW_WRITE
- D. Triple-DES Source Listings
- E. Image Filter Listings
-
F. Selected References
Product information
- Title: Practical FPGA Programming in C
- Author(s):
- Release date: April 2005
- Publisher(s): Pearson
- ISBN: 0131543180
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