[bib06_1] [1] G. Cyr, G. Bois and M. Aboulhamid, “Generation of Processor Interface for SoC Using Standard Communication Protocol,” IEE Proceedings of the Computers and Digital Techniques, Vol. 151, No. 5, 2004, pp. 367–376.
[bib06_2] [2] Virtual Component Interface Standard, http://www.vsi.org
[bib06_3] [3] M.S. Allen, W.K. Lewchuk and J.D. Coddington, “A High Performance Bus and Cache Controller for PowerPC Multiprocessing Systems,” IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD), 1995, pp. 204–211.
[bib06_4] [4] R. Hofmann and B. Drerup, “Next Generation CoreConnect Processor Local Bus Architecture,” IEEE International ASIC/SOC Conference, 2002, pp. 221–225.
[bib06_5] [5] A. Allison, (editor), “Hardware ...
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