Book description
The only book to offer special coverage of the fundamentals of multicore DSP for implementation on the TMS320C66xx SoC
This unique book provides readers with an understanding of the TMS320C66xx SoC as well as its constraints. It offers critical analysis of each element, which not only broadens their knowledge of the subject, but aids them in gaining a better understanding of how these elements work so well together.
Written by Texas Instruments’ First DSP Educator Award winner, Naim Dahnoun, the book teaches readers how to use the development tools, take advantage of the maximum performance and functionality of this processor and have an understanding of the rich content which spans from architecture, development tools and programming models, such as OpenCL and OpenMP, to debugging tools. It also covers various multicore audio and image applications in detail. Additionally, this one-of-a-kind book is supplemented with:
- A rich set of tested laboratory exercises and solutions
- Audio and Image processing applications source code for the Code Composer Studio (integrated development environment from Texas Instruments)
- Multiple tables and illustrations
With no other book on the market offering any coverage at all on the subject and its rich content with twenty chapters, Multicore DSP: From Algorithms to Real-time Implementation on the TMS320C66x SoC is a rare and much-needed source of information for undergraduates and postgraduates in the field that allows them to make real-time applications work in a relatively short period of time. It is also incredibly beneficial to hardware and software engineers involved in programming real-time embedded systems.
Table of contents
- Cover
- Title Page
- Preface
- Acknowledgements
- Foreword
- About the Companion Website
- 1 Introduction to DSP
- 2 The TMS320C66x architecture overview
- 3 Software development tools and the TMS320C6678 EVM
- 4 Numerical issues
-
5 Software optimisation
- 5.1 Introduction
- 5.2 Hindrance to software scalability for a multicore processor
- 5.3 Single‐core code optimisation procedure
- 5.4 Interfacing C with intrinsics, linear assembly and assembly
- 5.5 Assembly optimisation
- 5.6 Software pipelining
- 5.7 Linear assembly
- 5.8 Avoiding memory banks
- 5.9 Optimisation using the tools
- 5.10 Laboratory experiments
- 5.11 Conclusion
- References
- 6 The TMS320C66x interrupts
- 7 Real‐time operating system: TI‐RTOS
- 8 Enhanced Direct Memory Access (EDMA3) controller
-
9 Inter‐Processor Communication (IPC)
- 9.1 Introduction
- 9.2 Texas Instruments IPC
- 9.3 Notify module
- 9.4 MessageQ
- 9.5 ListMP module
- 9.6 GateMP module
- 9.7 Multi‐processor Memory Allocation: HeapBufMP, HeapMemMP and HeapMultiBufMP
- 9.8 Transport mechanisms for the IPC
- 9.9 Laboratory experiments with KeyStone I
- 9.10 Laboratory experiments with KeyStone II
- 9.11 Conclusion
- References
- 10 Single and multicore debugging
- 11 Bootloader for KeyStone I and KeyStone II
- 12 Introduction to OpenMP
-
13 Introduction to OpenCL for the KeyStone II
- 13.1 Introduction
- 13.2 Operation of OpenCL
- 13.3 Command queue
- 13.4 Kernel declaration
- 13.5 How do the kernels access data?
- 13.6 OpenCL memory model for the KeyStone
- 13.7 Synchronisation
- 13.8 Basic debugging profiling
- 13.9 OpenMP dispatch from OpenCL
- 13.10 Building the OpenCL project
- 13.11 Laboratory experiments
- 13.12 Conclusion
- References
- 14 Multicore Navigator
- 15 FIR filter implementation
- 16 IIR filter implementation
- 17 Adaptive filter implementation
- 18 FFT implementation
- 19 Hough transform
- 20 Stereo vision implementation
- Index
- End User License Agreement
Product information
- Title: Multicore DSP
- Author(s):
- Release date: February 2018
- Publisher(s): Wiley
- ISBN: 9781119003823
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