Microwave and Wireless Synthesizers: Theory and Design

1

LOOP FUNDAMENTALS

1-1 INTRODUCTION TO LINEAR LOOPS

The majority of the new frequency synthesizers utilize the phase-locked loop (PLL). Indeed, it was the realization of the PLL in an integrated circuit that led to the inexpensive frequency synthesizer. Because an understanding of PLLs is necessary for the design of frequency synthesizers, they are discussed in detail in this chapter. The emphasis here is on the PLL as used in a frequency synthesizer rather than on the PLL as used for signal detection. For the latter problem, the PLL input is a relatively low-level signal embedded in noise, and the PLL serves to detect the noisy signal. For PLL applications in frequency synthesizers, the input signal-to-noise ratio is high, and the PLL serves to lock out the output frequency on a multiple of the input frequency.

Although the PLL is a nonlinear device, it can be modeled as a linear device over most of its operating range. This chapter first presents the linearized analysis of the PLL, including its stability characteristics. The design of compensating filters to improve PLL performance is then discussed.

PLLs include a phase detector, low-pass filter, and voltage-controlled oscillator, as illustrated in Figure 1-1. The phase detector is a nonlinear device, and its characteristics determine loop performance. The various types of phase detectors are described in Chapter 3. The loop transient performance is discussed in Section 1-10. No generalized results are available for transient ...