Logically Determined Design: Clockless System Design with NULL Convention Logic

APPENDIX B

Playing with 2NCL

To use NCL for commercial purposes, a license must be obtained from Theseus Logic which includes macro libraries of operators that supports direct fabrication in recent CMOS technologies. An academic license is available for teaching institutions, and this includes libraries and tools. However, to get an initial understanding and experience of logically determined system design and behavior, anyone can quickly and conveniently begin running circuits in simulators and even mapping circuits into FPGAs.

The NCL operators can be represented in terms of SR flip-flops with Boolean set and reset functions, and logically determined systems can be reliably expressed in terms of these operators. While these representations are inefficient for commercial purposes, they are quite satisfactory for learning. They can be used with software circuit simulators and with FPGA implementations. Most of the NCL example circuits in this book were simulated using these macros in a simulation program called Circuit-maker [6].

The following examples provide the basics of mapping the NCL operators into the SR flip-flop representations. The SR flip-flop provides the state-holding behavior. A set pull-up or transition to DATA function transitions the flip-flop to DATA. The transition ...