Learning FPGAs

Table of contents

1. Preface
   1. Expected Background
   2. Conventions Used in This Book
      1. Using Code Examples
      2. How to Contact Us
2. 1. Introduction
   1. The Mojo
   2. FPGAs Versus Microcontrollers: A Comparison
   3. Setting Up Your Environment
      1. Installing ISE
      2. Installing the Mojo IDE
      3. Mojo IDE Settings
3. 2. Your First FPGA Project
   1. Creating a New Project
   2. Understanding Modules
   3. Representing Values
   4. Using Always Blocks
   5. Connecting the Button
   6. Building Your Project
   7. Loading Your Project
   8. Some Notes on Hardware
   9. Duplication
   10. Array Indexing
   11. Always Block Priority
4. 3. Combinational Logic
   1. IO Shield
   2. Logic Functions
   3. Bitwise Operators
   4. Reduction Operators
   5. Math
   6. Common Subcircuits
      1. Multiplexers
      2. Decoders
      3. Encoders
      4. Arbiters
      5. Decoder, Encoder, and Arbiter Example
5. 4. Sequential Logic
   1. Feedback Loops and Flip-Flops
      1. Clocks
   2. Timing and Metastability
      1. External Inputs
      2. Add the Components
      3. Instantiating a Module
      4. Checking Timing
      5. Bouncy Buttons and Edges
      6. Running Total
6. 5. Seven-Segment LED Displays and Finite‑State Machines
   1. Single Digit
   2. Lookup Tables
   3. Binary to Decimal
   4. The Finite-State Machine
   5. The Stopwatch
7. 6. Hello AVR
   1. The AVR Interface
      1. Sending and Receiving Data
   2. ROMs
   3. The Greeter
   4. Getting Personal with RAM
8. 7. Mixing Colors with an RGB LED
   1. External I/O Constraints
   2. Getting Fancy with PWM
   3. Register Interface
9. 8. Analog Inputs
   1. The AVR Interface
   2. All the Channels
10. 9. A Basic Processor
    1. What Is a Processor?
       1. Instruction Sets
       2. Memory
    2. Initial Design
       1. NOP
       2. LOAD and STORE
       3. SET
       4. LT and EQ
       5. BEQ and BNEQ
       6. The ALU
       7. The Program Counter
    3. The Processor
       1. The Program
    4. The Assembler
11. 10. FPGA Internals
    1. General Fabric and Routing Resources
    2. Special Primitives
       1. Block RAM (Memory)
       2. Math
       3. Clocking
       4. Special I/O Features
12. 11. Advanced Timing and Clock Domains
    1. Breaking Timing and Fixing It with Pipelining
    2. Crossing Clock Domains
13. 12. Sound Direction Detection: An Advanced Example
    1. Theory of Operation
    2. Implementation Overview
    3. Implementation
       1. PDM Microphones
       2. FFT
       3. CORDIC
       4. CAPTURE State
       5. FFT State
       6. DIFFERENCE State
       7. AGGREGATE State
14. 13. Lucid Reference
    1. Lucid Quick Reference
    2. Modules
       1. Parameter Lists
       2. Port Lists
       3. Module Body
    3. Expressions
       1. Signals and Constants
       2. Functions
       3. Groups
       4. Array Concatenation
       5. Array Duplication
       6. Array Builder
       7. Bitwise Invert
       8. Logical Invert
       9. Negate
       10. Multiply
       11. Divide
       12. Add and Subtract
       13. Bit Shifting
       14. Bitwise Operators
       15. Reduction Operators
       16. Comparison Operators
       17. Logical AND and OR
       18. Ternary Operator
    4. Literal Values
       1. Numbers
       2. Strings
    5. global Blocks
    6. Array Size and Bit Selection
       1. Array Size
       2. Bit Selectors
    7. Comments
15. A. Full Modules and Proof
    1. Greeter Module
    2. ADC Multichannel Example
    3. Basic Processor
    4. Direction Detection Proof
16. Index