FPGA Programming for Beginners

Book description

Get started with FPGA programming using SystemVerilog, and develop real-world skills by building projects, including a calculator and a keyboard

Key Features

  • Explore different FPGA usage methods and the FPGA tool flow
  • Learn how to design, test, and implement hardware circuits using SystemVerilog
  • Build real-world FPGA projects such as a calculator and a keyboard using FPGA resources

Book Description

Field Programmable Gate Arrays (FPGAs) have now become a core part of most modern electronic and computer systems. However, to implement your ideas in the real world, you need to get your head around the FPGA architecture, its toolset, and critical design considerations. FPGA Programming for Beginners will help you bring your ideas to life by guiding you through the entire process of programming FPGAs and designing hardware circuits using SystemVerilog.

The book will introduce you to the FPGA and Xilinx architectures and show you how to work on your first project, which includes toggling an LED. You’ll then cover SystemVerilog RTL designs and their implementations. Next, you’ll get to grips with using the combinational Boolean logic design and work on several projects, such as creating a calculator and updating it using FPGA resources. Later, the book will take you through the advanced concepts of AXI and show you how to create a keyboard using PS/2. Finally, you’ll be able to consolidate all the projects in the book to create a unified output using a Video Graphics Array (VGA) controller that you’ll design.

By the end of this SystemVerilog FPGA book, you’ll have learned how to work with FPGA systems and be able to design hardware circuits and boards using SystemVerilog programming.

What you will learn

  • Understand the FPGA architecture and its implementation
  • Get to grips with writing SystemVerilog RTL
  • Make FPGA projects using SystemVerilog programming
  • Work with computer math basics, parallelism, and pipelining
  • Explore the advanced topics of AXI and keyboard interfacing with PS/2
  • Discover how you can implement a VGA interface in your projects

Who this book is for

This FPGA design book is for embedded system developers, engineers, and programmers who want to learn FPGA and SystemVerilog programming from scratch. FPGA designers looking to gain hands-on experience in working on real-world projects will also find this book useful.

Table of contents

  1. FPGA Programming for Beginners
  2. Contributors
  3. About the author
  4. About the reviewer
  5. Preface
    1. Who this book is for
    2. What this book covers
    3. To get the most out of this book
    4. Download the example code files
    5. Download the color images
    6. Conventions used
    7. Get in touch
    8. Reviews
  6. Section 1: Introduction to FPGAs and Xilinx Architectures
  7. Chapter 1: Introduction to FPGA Architectures and Xilinx Vivado
    1. Technical requirements
      1. Hardware
      2. Software
    2. What is an ASIC?
      1. Why an ASIC or FPGA?
    3. How does a company create a programmable device using an ASIC process?
      1. Fundamental logic gates
        1. Assign statement
        2. Comments
        3. if statement
        4. Logical NOT (!)
        5. Logical AND (&&), bitwise AND (&)
        6. Logical OR (||), bitwise OR (|)
        7. XOR (^)
      2. More complex operations
    4. Introducing FPGAs
      1. Exploring the Xilinx Artix-7 and 7 series devices
      2. Combinational logic blocks
      3. Storage
      4. Clocking
      5. I/Os
      6. DSP48E1
    5. ASMBL architecture
    6. Introduction to the Vivado toolset and evaluation boards
    7. Evaluation boards
      1. Nexys A7 100T (or 50T)
      2. Basys 3
    8. Introducing Vivado
      1. Vivado installation
      2. Directory structure
      3. Running the example
        1. Loading the design
        2. Running a simulation
        3. Implementation
        4. Program the board
    9. Summary
    10. Questions
      1. Challenge
    11. Further reading
  8. Section 2: Introduction to Verilog RTL Design, Simulation, and Implementation
  9. Chapter 2: Combinational Logic
    1. Technical requirements
    2. Creating SystemVerilog modules
      1. How to create reusable code – parameters
    3. Introducing data types
      1. Introducing built-in data types
      2. Creating arrays
        1. Querying arrays
        2. Assigning to arrays
      3. Handling multiple-driven nets
      4. Handling signed and unsigned numbers
      5. Adding bits to a signal by concatenating
      6. Casting signed and unsigned numbers
      7. Creating user-defined types
      8. Accessing signals using values with enumerated types
    4. Packaging up code using functions
      1. Creating combinational logic
        1. Handling assignment operators
        2. Incrementing signals
        3. Making decisions – if-then-else
        4. Introducing the case statement
        5. Using the conditional operator to select data
      2. Using custom data types
        1. Creating structures
        2. Creating unions
    5. Project 1 – creating combinational logic
      1. Testbench
        1. Simulating using targeted testing
        2. Simulating using randomized testing
        3. Simulating using constrained randomization
      2. Implementing a leading-one detector using the case statement
        1. Controlling implementation using generate
      3. Designing a reusable leading-one detector using a for loop
        1. Setting SELECTOR = DOWN_FOR
        2. Setting SELECTOR = UP_FOR
      4. Counting the number of ones
      5. Implementing an adder/subtractor
        1. Add
        2. Subtractor
      6. Multiplier
      7. Bringing it all together
        1. Adding a latch
    6. Summary
    7. Questions
      1. Challenge
    8. Further reading
  10. Chapter 3: Counting Button Presses
    1. Technical requirements
    2. What is a sequential element?
      1. Clocking your design
      2. Looking at a basic register
        1. Creating a flip flop
        2. When to use always @() for FF generation
        3. Using non-blocking assignments
      3. Registers in the Artix 7
        1. How to hold onto state using clock enables
        2. Resetting the FF
    3. Project 2 – Counting button presses
      1. Introducing the seven-segment display
      2. Detecting button presses
        1. Analyzing timing
        2. Looking at asynchronous issues
        3. Using the asynchronous signal directly
        4. The problem with push buttons
        5. Designing a safe implementation
        6. Switching to decimal representation
        7. Introducing the ILA
      3. What about simulation?
    4. Deep dive on synchronization
      1. Why use multiple clocks?
      2. Two-stage synchronizer
      3. Synchronizing control signals
      4. Passing data
    5. Summary
    6. Questions
      1. Challenge
    7. Further reading
  11. Chapter 4: Let's Build a Calculator
    1. Technical requirements
    2. Implementing our first state machine
      1. Writing a purely sequential state machine
      2. Splitting combination and sequential logic in a state machine
      3. Designing a calculator interface
      4. Designing a Moore state machine
      5. Implementing a Mealy state machine
      6. Practical state machine design
    3. Project 3 – Building a simple calculator
      1. Packaging for reuse
      2. Coding the top level
        1. Changing frequencies by using a PLL or MMCM
      3. Investigating the divider
        1. Building a non-restoring divider state machine
        2. Simulating the divider
        3. Sizing the intermediate remainder
    4. Project 4 – Keeping cars in line
      1. Defining the state diagram
      2. Displaying our traffic lights
        1. Pulse width modulation
        2. Implementing delays with a counter
    5. Summary
    6. Questions
      1. Challenge
      2. Extra challenge
    7. Further reading
  12. Chapter 5: FPGA Resources and How to Use Them
    1. Technical requirements
    2. Project 5 – Listening and learning
      1. What is a PDM microphone?
      2. Simulating the microphone
      3. Introducing storage
        1. RAM – Inferring versus instantiating versus the IP catalog
        2. Basic RAM types
        3. Instantiating memories using xpm_memory
        4. Using the IP catalog to create memory
      4. Capturing audio data
    3. Project 6 – Using the temperature sensor
      1. Handling the data
      2. Smoothing out the data
        1. Deeper dive into FIFOs
        2. Constraints
        3. Generating our FIFO
    4. Summary
    5. Questions
    6. Further reading
  13. Chapter 6: Math, Parallelism, and Pipelined Design
    1. Technical requirements
    2. Introduction to fixed-point numbers
    3. Project 7 – Using fixed-point arithmetic in our temperature sensor
      1. Using fixed-point arithmetic to clean up the bring-up time
      2. Temperature conversion using fixed-point arithmetic
      3. What about floating-point numbers?
        1. Floating-point addition and subtraction
        2. Floating-point multiplication
        3. Floating-point reciprocal
        4. A more practical floating-point operation library
      4. A quick look at the AXI streaming interface
    4. Project 8 – Updating the temperature sensor project to a pipelined floating-point implementation
      1. Fix to floating point conversion
      2. Floating-point math operations
      3. Float to fixed point conversion
      4. Simulation
    5. Parallel designs
      1. ML and AI and massive parallelism
      2. Parallel design – a quick example
    6. Summary
    7. Questions
      1. Challenge
    8. Further reading
  14. Section 3: Interfacing with External Components
  15. Chapter 7: Introduction to AXI
    1. Technical requirements
    2. AXI streaming
    3. Project 9 – creating IPs for Vivado using AXI streaming interfaces
      1. Seven-segment display streaming interface
      2. Developing the ADT7420 IP
      3. Understanding the flt_temp core
      4. IP integrator
        1. IP integrator debugging
    4. AXI4 interfaces (full and AXI-Lite)
    5. Developing IPs – AXI-Lite, full, and streaming
      1. Adding an unpackaged IP to the IP integrator
    6. Summary
    7. Questions
    8. Further reading
  16. Chapter 8: Lots of Data? MIG and DDR2
    1. Technical requirements
    2. Project 10 – introducing external memory
      1. Introduction to DDR2
      2. Generating a DDR2 controller using the Xilinx MIG
        1. Setting AXI parameters
        2. Setting memory options
        3. Defining the FPGA options
      3. Modifying the design for use on the board
    3. Other external memory types
      1. Quad Data Rate (QDR) SRAM
      2. HyperRAM
      3. SPI RAM
    4. Summary
    5. Questions
      1. Challenge
    6. Further reading
  17. Chapter 9: A Better Way to Display – VGA
    1. Technical requirements
    2. Project 11 – Introducing the VGA
      1. Defining registers
        1. Coding a simple AXI Lite interface
      2. Generating timing for the VGA
        1. Monitor timing generator
      3. Displaying text
        1. Requesting memory
      4. Testing the VGA controller
      5. Examining the constraints
    3. Summary
    4. Questions
    5. Challenge
    6. Further reading
  18. Chapter 10: Bringing It All Together
    1. Technical requirements
    2. Investigating the keyboard interface
    3. Project 12 – keyboard handling
      1. Testing the PS/2
    4. Project 13 – bringing it all together
      1. Displaying PS/2 keycodes on the VGA screen
      2. Displaying the temperature sensor data
        1. Adding a custom character to the text ROM
      3. Displaying audio data
    5. Summary
    6. Questions
    7. Challenge
    8. Further reading
  19. Chapter 11: Advanced Topics
    1. Technical requirements
    2. Exploring more advanced SystemVerilog constructs
      1. Interfacing components using the interface construct
      2. Using structures
      3. Block labels
      4. Looping using for loops
      5. Looping using do…while
      6. Exiting a loop using disable
      7. Skipping code using continue
      8. Using constants
    3. Exploring some more advanced verification constructs
      1. Introducing SystemVerilog queues
      2. Display enhancements
      3. A quick introduction to assertions
      4. Using $error or $fatal in synthesis
    4. Other gotchas and how to avoid them
      1. Inferring single bit wires
      2. Bit width mismatches
      3. Upgrading or downgrading Vivado messages
      4. Handling timing closure
        1. How to pipeline a design
    5. Summary
    6. Questions
    7. Further reading
    8. Why subscribe?
  20. Other Books You May Enjoy
    1. Packt is searching for authors like you
    2. Leave a review - let other readers know what you think

Product information

  • Title: FPGA Programming for Beginners
  • Author(s): Frank Bruno
  • Release date: March 2021
  • Publisher(s): Packt Publishing
  • ISBN: 9781789805413