Formal Verification, 2nd Edition

Formal Verification, 2nd Edition

by Erik Seligman, Tom Schubert, M Kumar
Released May 2023
Publisher(s): Morgan Kaufmann
ISBN: 9780323956130

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Book description

Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mathematically explore the quality or other aspects of a Register Transfer Level (RTL) design without using simulations. This can reduce time spent validating designs and more quickly reach a final design for manufacturing. Building on a basic knowledge of SystemVerilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes.

Every chapter in the second edition has been updated to reflect evolving FV practices and advanced techniques. In addition, a new chapter, Formal Signoff on Real Projects, provides guidelines for implementing signoff quality FV, completely replacing some simulation tasks with significantly more productive FV methods. After reading this book, readers will be prepared to introduce FV in their organization to effectively deploy FV techniques that increase design and validation productivity.

  • Covers formal verification algorithms that help users gain full coverage without exhaustive simulation
  • Helps readers understand formal verification tools and how they differ from simulation tools
  • Shows how to create instant testbenches to gain insights into how models work and to find initial bugs
  • Presents insights from Intel insiders who share their hard-won knowledge and solutions to complex design problems

Table of contents

  1. Cover image
  2. Title page
  3. Table of Contents
  4. Copyright
  5. Foreword by Harry Foster
  6. Foreword to 1st edition by Robert Bentley
  7. Acknowledgments
  8. Chapter 1. Formal verification: from dreams to reality
    1. What is FV?
    2. Why this book?
    3. A motivating anecdote
    4. FV: the next level of depth
    5. The emergence of practical FV
    6. Challenges in implementing FV
    7. Amplifying the power of formal
    8. Getting the most out of this book
  9. Chapter 2. Basic formal verification algorithms
    1. Formal verification in the validation process
    2. A simple vending machine example
    3. Comparing models
    4. Cones of influence
    5. Formalizing operation definitions
    6. Boolean algebra notation
    7. Binary decision diagrams
    8. Boolean satisfiability
    9. Chapter summary
  10. Chapter 3. Introduction to SystemVerilog Assertions
    1. Basic assertion concepts
    2. Sequences, properties, and concurrent assertions
    3. Summary
    4. Practical tips from this chapter
  11. Chapter 4. Formal property verification
    1. What is FPV?
    2. Example for this chapter: combination lock
    3. Bringing up a basic FPV environment
    4. How is FPV different from simulation?
    5. Deciding where and how to run FPV
    6. Summary
    7. Practical tips from this chapter
  12. Chapter 5. Effective formal property verification for design exercise
    1. Example for this chapter: traffic light controller
    2. Creating a design exercise plan
    3. Setting up the design exercise FPV environment
    4. Wiggling the design
    5. Exploring more interesting behaviors
    6. Removing simplifications and exploring more behaviors
    7. Summary
  13. Chapter 6. Effective FPV for verification
    1. Deciding on your FPV goals
    2. Staging your FPV efforts
    3. Example for this chapter: simple ALU
    4. Understanding the design
    5. Creating the FPV verification plan
    6. Removing simplifications and exploring more behaviors
    7. Summary
  14. Chapter 7. Formal property verification apps for specific problems
    1. Reusable protocol verification
    2. Unreachable coverage elimination
    3. Connectivity verification
    4. Control register verification
    5. Postsilicon debug and reactive FPV
    6. Summary
  15. Chapter 8. Formal equivalence verification
    1. Types of equivalence to check
    2. FEV use cases
    3. Running FEV
    4. Additional FEV challenges
    5. Summary
  16. Chapter 9. Formal verification's greatest bloopers: the danger of false positives
    1. Misuse of the SVA language
    2. Vacuity issues
    3. Implicit or unstated assumptions
    4. Division of labor
    5. Summary
    6. Practical tips from this chapter
  17. Chapter 10. Dealing with complexity
    1. Design state and associated complexity
    2. Example for this chapter: memory controller
    3. Observing complexity issues
    4. Simple techniques for convergence
    5. Helper assumptions … and not-so-helpful assumptions
    6. Generalizing analysis using free variables
    7. Abstraction models for complexity reduction
    8. Semiformal verification
    9. Evading the complexity problem: design and verification working together
    10. Summary
  18. Chapter 11. Formal signoff on real projects
    1. Overall signoff methodology
    2. Plan and architect
    3. Apply and execute
    4. Cover and regress
    5. Track and close
    6. Conclusions
    7. Practical tips from this chapter
  19. Chapter 12. Your new FV-aware lifestyle
    1. Uses of FV
    2. Individual preparation to use FV
    3. Getting a team started on FV
    4. Making your manager happy
    5. What do FVers really do?
    6. Summary
    7. Practical tips from this chapter
  20. Index

Product information

  • Title: Formal Verification, 2nd Edition
  • Author(s): Erik Seligman, Tom Schubert, M Kumar
  • Release date: May 2023
  • Publisher(s): Morgan Kaufmann
  • ISBN: 9780323956130