Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems

6.1   THE STATE OF THE ART

As we saw in Chapter 3, the use of FPGA devices as computing structures is motivated by the perceived performance and price performance advantages of hardware customized for a particular application, over more general-purpose computing structures. In particular we can identify the following key advantages:

1. There is no overhead associated with fetching and decoding instructions.
2. Bus structures can be tailored to the operation: for example, an operation that had five input operands and one output could have five input buses and one output bus, allowing it to complete in a single cycle. On a conventional architecture, assuming all operands were in memory, at least six cycles of the shared data bus would be required.
3. Arithmetic units can be provided for nonstandard operations.
4. Operation units need be no longer than required. For example, if we are operating on 8-bit data, we would use an 8-bit adder; this adder could be four times smaller and faster than a 32-bit adder in a conventional machine.
5. Because tailored operation units are smaller we can have more of them, thus allowing a more parallel solution to increase performance.
6. When the computer is intended to process a stream of high bandwidth input data, the peripheral interface itself can be implemented on the programmable device. In these applications the speed at which the host can transfer data from the peripheral to the special-purpose computer through its bus would not be a bottleneck.

The main ...