Digital Processing

7

DSP-Based Coherent Optical Transmission Systems

7.1    Introduction

In Chapter 6, a generic flow chart of the digital signal process was introduced (see Figure 6.1). This diagram is now reintroduced here, where the clock/timing recovered signals are feedback into the sampling unit of the analog to digital converter (ADC) so as to obtain the best correct timing for sampling the incoming data sequence for digital signal processing (DSP). Any errors made at this stage of timing will result into high deviation of the bit error rate (BER) in the symbol decoder shown in Figure 7.1. It is also noted that the vertical polarized channel (V-pol) and horizontal polarized (H-pol) channels are detected, and their inphase (I) and quadrature (Q) components ...