Combinational logic design principles
4.1 Introduction
The gates dealt with in the two preceding chapters have been the AND, OR and NOT gates. These gates are the easiest to handle using the formal methods of Karnaugh maps and Quine–McCluskey minimisation, but in practice, logic circuits are often actually implemented using NAND and NOR gates. Historically this was because these gates were the easiest to fabricate using readily available logic technologies, and in the case of certain technologies currently at the research stage these types of limitations are still present. Although AND and OR gates are also available using most types of SSI technologies, there is a smaller selection of them, they may be more expensive, and they may have slightly ...
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