Book description
For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually work when turned into physical circuits. Throughout the book, many small examples are used to validate concepts and demonstrate how to apply design skills.
This book takes readers who have already learned the fundamentals of digital design to the point where they can produce working circuits using modern design methodologies. It clearly explains what is useful for circuit design and what parts of the languages are only software, providing a non-theoretical, practical guide to robust, reliable and optimized hardware design and development.
- Produce working hardware: Covers not only syntax, but also provides design know-how, addressing problems such as synchronization and partitioning to produce working solutions
- Usable examples: Numerous small examples throughout the book demonstrate concepts in an easy-to-grasp manner
- Essential knowledge: Covers the vital design topics of synchronization, essential for producing working silicon; asynchronous interfacing techniques; and design techniques for circuit optimization, including partitioning
Table of contents
- Cover
- Title page
- Table of Contents
- Copyright Page
- About the author
- Preface
- Acknowledgments
- Chapter 1: Introduction
- Chapter 2: Bottom-up design
- Chapter 3: Behavioral coding part I: blocks, variables, and operators
- Chapter 4: Behavioral coding part II: defines, parameters, enumerated types, and packages
- Chapter 5: Behavioral coding part III: loops and branches
- Chapter 6: Subroutines and interfaces
-
Chapter 7: Synchronization
- Abstract
- Latch instability
- Flipflops, latches, and violations
- Asynchronous assert, synchronous deassert
- Slow-speed single-bit clocked asynchronous interfaces
- High-speed single-bit clocked asynchronous interfaces
- Multiple high-speed single-bit clocked asynchronous interfaces
- Asynchronous parallel buses
- High-speed asynchronous serial links
- Summary
- Chapter 8: Simulation, timing, and race conditions
- Chapter 9: Architectural choices
- Chapter 10: Design for testability
- Chapter 11: Library modeling
- Chapter 12: Design examples
- Appendix A: SystemVerilog keywords
- Appendix B: Standard combinational and sequential functions
- Appendix C: Number systems
- Index
Product information
- Title: Digital Integrated Circuit Design Using Verilog and Systemverilog
- Author(s):
- Release date: September 2014
- Publisher(s): Newnes
- ISBN: 9780124095298
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