Digital Design and Computer Architecture, ARM Edition

Table 6.10

Index mode control bits for memory instructions

P	W	Index Mode
0	0	Post-index
0	1	Not supported
1	0	Offset
1	1	Pre-index

Table 6.11

Memory operation type control bits for memory instructions

L	B	Instruction
0	0	STR
0	1	STRB
1	0	LDR
1	1	LDRB

Example 6.3

Translating Memory Instructions into Machine Language

Translate the following assembly language statement into machine language.

STR R11, [R5], #-26

Solution

STR is a memory instruction, so it has an op of 01₂. According to Table 6.11, L = 0 and B = 0 for STR. The instruction uses post-indexing, so according to Table 6.10, P = 0 and W = 0. The immediate offset is subtracted from the base, so $\overline{\mathit{I}}=0$ and U = 0.