Computer Organization and Design RISC-V Edition

1. No change. You can calculate NAND quickly using the current ALU since $\overline{(a\cdot b)}=\overline{a}\text{+}\overline{b}$ and we already have NOT a, NOT b, and OR.

2. You must expand the big multiplexor to add another input, and then add new logic to calculate NAND.

A.6 Faster Addition: Carry Lookahead

The key to speeding up addition is determining the carry in to the high-order bits sooner. There are a variety of schemes to anticipate the carry so that the worst-case scenario is a function of the log₂ of the number of bits in the adder. These anticipatory signals are faster because they go through fewer gates in sequence, but it takes many more gates to anticipate the proper ...