CMOS Voltage References: An Analytical and Practical Perspective

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Error Sources in Bandgap Voltage Reference Circuit

The opamp based β-multiplier bandgap voltage reference circuit in Figure 3.4 discussed in Chapter 3 is derived with ideal components, such that the opamp can attain an infinite open loop gain, and zero input offset to maintain the voltages at the input terminals to be identical in the close loop circuit. Furthermore, the transistors M₁, M₂, and M₃ in Figure 3.4 are assumed to be perfectly matched, such that the currents at each branch of the current mirror are identical to I₁ = I₂ = I₃. Moreover, the output current I_LOAD from the bandgap voltage reference circuit is assumed to be zero and thus I₃ = I_BE3. In addition, Q₁ and Q₂ are assumed to have the same I_S and β. Furthermore, the BJTs are assumed to have large β, such that I_B is small enough to be ignored in the circuit without affecting the analysis. Last but not least, the resistor ratio R₂/R₁ is assumed to be fabricated with high accuracy. With the above assumptions, the output voltage of the opamp based β-multiplier bandgap voltage reference circuit is given by Equation 3.12. Unfortunately, the above assumptions are void in reality and the consequences of components imperfection impose compensation errors and degrade the stability of the voltage reference circuit to different extents. Figure 4.1 shows the variation of the output voltages obtained from three different samples of the opamp based β-multiplier bandgap voltage reference circuit simulated with different process ...