The field-programmable gate array (FPGA) consists of integrated circuits that can be configured after manufacture. The programming for configuration is specified using hardware description language (HDL). A field-programmable device can be modified without disassembling the device; this device contains a series of gate arrays that create truth tables to calculate inputs from a data stream as shown in the following screenshot:
![](/api/v2/epubs/9781788995788/files/assets/960b33e3-f8ed-468e-81f2-762f670f9d43.png)
As FPGAs support parallelism from the core, they are claimed to be fifteen times more efficient compared to GPU-based mining.