chapter 6Basic Transimpedance Amplifier Design

We start our exploration of TIA topologies with the low- and high-impedance front-ends. These simple front-ends illustrate important design trade-offs and motivate the need for more sophisticated TIA topologies. Then, we move on to the popular shunt-feedback architecture, which we study in great detail. We calculate the transimpedance, input impedance, and output impedance. We analyze the stability and the transimpedance limit of single- and multistage implementations. Next, we derive the noise performance of TIAs with FET and BJT front-ends. We explain Ogawa's noise factor and its relationship to induced gate noise. After that, we discuss the noise optimization of TIAs with FET and BJT front-ends by means of device sizing and biasing. We examine the impact of constraints, such as a constant gain-bandwidth product, on the noise optimum. Finally, we investigate noise-matching networks and their properties.

6.1 Low- and High-Impedance Front-Ends

The term TIA in its wide sense refers to any circuit that converts a current into a voltage. This includes the simple resistor! In this sense, the low-impedance front-end and the high-impedance front-end are simple forms of TIAs.

Low-Impedance Front-End

A simple low-impedance front-end is shown in Fig. 6.1(a). A 50-c06-math-001 load resistor converts the photodetector current into a proportional voltage ...

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