Analog Electronics with LabVIEW®

P9.5. Transistor Parameters and DC Imbalance

Procedure Sweep.vi runs a special version of DC.vi, DCimbal.vi, as a subVI of Sweep.vi. Sweep.vi sends out a range of bias voltage, 5 V<VDD <10 V (Chan0_out), in 0.5 V steps. VSG, ID1, and ID2 are measured at each step. A three-column data file is saved for the Mathcad project evaluation. Note that Circuit P9.2 has the gates connected to make certain that the gate voltages are equal. There is no balancing in this circuit, as the goal is to study circuit imbalances. DCimbal.vi calls for Chan1_out ...