Analog Electronics with LabVIEW®

P9.3. Determination of the PMOS Parameters

Procedure Parameters.vi sweeps output channel Chan0_out from VDD –1 to VDD + 1 (where the design bias VDD is set in the Front Panel). The gain measurement will be made at VDD, intermediate to the sweep range. Since voltage VSD is approximately equal to 2VSG, VSD will be relatively constant during the sweep, as is required for a reliable measurement of Kp and Vtpo. Run the VI for VDD set at 6 V and 8V and verify that Vtpo is close to the same for both VDD values. For the larger VDD (and VSD), kp (at ...