Errata

* The first code sample should be labeled "count_words.c"
* The second code sample should be labeled "lexer.l"
* The third code sample should be labeled "Makefile"

The examples.tar.gz download contains the files with these names.

first two lines of the make file should read:
count_words: count_words.o lexer.o -lfl
gcc count_words.o lexer.o -lfl -o count_words

and last line on the page should be:
gcc count_words.o lexer.o -lfl -o count_words

In general, a variable name must be surrounded by $() to be recognized by make.
should be:
In general, a variable name must be surrounded by $() or ${} to be recognized by make.

"There are six core automatic variables:"
should be:
"There are seven core automatic variables:"

"... Unless you direct it otherwise, make will look in the current directory for its targets and prerequisites."
should be:
"... Unless you direct it otherwise, make will look only in the current directory for its targets and prerequisites."

$(OBJECTS): %.o: %c
should be
$(OBJECTS): %.o: %.c
^

"An implicit rule is either a pattern rule or a suffix rule (which we will discuss briefly later)."
should be:
"An implicit rule is either a pattern rule or a suffix rule.

add a "@" to the $(MAKE) command

"ARFLGS"
should read:
"ARFLAGS"

The last sentence before the code in middle of page explains why and how this books uses
the term "macro". But immediately after the code "variable" is used as an interchangeable term
for "macro". If we understood the author correctly, the first 3 occurences of "variable"
(on the 1st, 2nd and 3rd line after the code) should be replaced by "macro". (The fourth occurence
of "variable" (on line 3-4) would not be changed.)

Add to the bottom of page 50:

When the gui.o target is finished, CPPFLAGS will revert to its original value.
Pattern-specific variables are similar, only they are specified in
a pattern rule (see page 21).

"using the $? form"
->
"using the ?= form"

ifeq "$(strip $(OPTIONS)) "-d"
should be:
ifeq "$(strip $(OPTIONS))" "-d"

<para> It is worth noting that using an include directive
before the first target in a makefile might change the default
goal. That is, if the include file contains any targets at
all the first of those targets will become the default goal for
the makefile. This can be avoided by simply placing the
desired default goal before the include (even without
prerequisites or targets):

# Ensure all is the default goal.
all:

include support.mk

# Now that we have our variables defined, complete the all target.
all: $(programs)

One closing parantheses too much.

"$wildcard pattern...)" -> "$(wildcard pattern...)"
[opening parantheses is missing)

One closing parantheses too much.

$(filter 1 $(words

is missing a comma after the "1"

The tags for the format "Replaceable" shouldn't be printed.
--directory=<replaceable>directory</replaceable>
should be:
--directory=directory
(2nd directory should be in italics)

$(MAKE) --directory=$$f clean;

Should be changed to:

$(MAKE) --directory=$$d clean;

"...is up your site."
should read:
"...is up to your site."

Suffice to say that the prerequisite all.javas contains a list of all java files to be compiled.
to:
Suffice to say that the prerequisite all.javas, which is the value of the variable all_javas, contains a list of all java files to be compiled.

"The compile-bean function comaccepts..." that last word should be just "accepts"

shopt -s nullglob &&
should have a trailing backslash:
shopt -s nullglob && \

"$ make debug PATH SHELL"
should be:
"$ make debug USERNAME SHELL"

The <literal> and </literal> tags shouldn't be printed.