Designing Embedded Hardware by John Catsoulis This errata page lists errors outstanding in the most recent printing. If you have technical questions or error reports, you can send them to booktech@oreilly.com. Please specify the printing date of your copy. This page was updated December 16, 2004. Here's a key to the markup: [page-number]: serious technical mistake {page-number}: minor technical mistake : important language/formatting problem (page-number): language change or minor formatting problem ?page-number?: reader question or request for clarification Confirmed errors: (iv) in the 2/03 printing, there is an extra copyright paragraph that doesn't belong. It starts with "Material in Chapter 3, SWISS-PROT, and Chapter 5, PROSITE"" It was only in the 2/03 printing and has been removed from future printings {14} Figure 1-7; The arrows for the "status output" signals should be pointing away from the ALU. [73] 3rd paragraph; These switching regulators are available in tiny surface-mount SO-8 or in standard DIP (Dual Inline Package) packages (discussed in Chapter 4) and require only two external components. switching regulators should be: linear regulators (http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1131) [85] Figure 4-1; The footprints of the surface mount and through hole components are incorrect with respect to pins 5,6,7,8 on both footprints shown. The actual footprints should have the following pin assignments: 1 |-----| 8 2 | | 7 3 | | 6 4 |-----| 5 This error is extremely important especially if one were to design a printed circuit board using components with similar footprints, DIP through hole components are very common as are surface mount. AUTHOR: I checked the book, and the reader is quite correct. > That's a major fault. With electronics diagrams, every marking, > name and number, and where and how they appear is vitally important. > Things just fail to work if diagrams are reproduced exactly as the > originals. [93] Figs 4-15, 4-17 and 4-18; Regulator pin 4 (OFF) is routed to Proc pin 1 (RESET) instead of to VCC as shown on the schematic Fig 4-13. {134} 2nd paragraph; port A and port B should be: port A and port C {143} the output "latch0" of the address decoder should be inverted before connecting to the "LE" input of the 74HCT573. (193) Figure 9-11; Figure 9-11 should be of a DS1305. The part labeled "PCF8583" should be "DS1305". (216) Figure 10-7 Figure 10-7 has two "C1" capacitors listed, but no "C2". The bottom capacitor should be labeled "C2", not C1. (221) 2nd paragraph; ... the standard has been expanded to support higher data rates of 1. 15Mbps and 4Mbps. should be: ... the standard has been expanded to support higher data rates of 115Mbps and 4Mbps. {230} Figure 10-23 - and paragraph directly above it; on Page 230, there is figure 10-23 showing USB Data Packets. The Data area is labeled "Data 0-1023 bits". The paragraph directly above the figure states, "A single data packet can transfer between 0 and 1023 bytes." The original diagram had "bytes", but it seems to have been corrupted to "bits". [254] Figure 12-3. Inverting amplifier; The "+" and "-" inside the op amp symbol should be swapped. The corrected Figure 12-3 can be found here - http://examples.oreilly.com/9780596003623/corrected_Figure12-3.jpg (284) 18th reference; http://www.ime-actia.com/can_intro.html Should be: http://www.ime-actia.com/web_can/about_can.htm